Language skills
諃铡盏榨謤榨斩
English
袪褍褋褋泻懈泄
校泻褉邪褩薪褋褜泻邪
Publications
Article
Results of Validation Analysis for Multi-Memory Bus BIST Engines
2024
1-3 乍栈
Article
Repair of Resistive Open Defects on Word-Lines and Bit-Lines of SRAMs
2024
1-6 乍栈
Article
An Approach for Increasing Memory Repair Efficiency
2024
1-6
Article
LEARNING METHODOLOGY FOR VALIDATION OF MEMORY BIST SOLUTIONS VIA A SHARED INTERFACE
2024
69-76
Article
Analytics for AI Related Applications of Multidimensional Multitape Finite Automata
2023
49-60
Article
Functional Safety Compliant Test & Repair Framework for System-on-Chip Lifecycle Management
2021
7-17
Article
Polynomial algorithm for equivalence problem of deterministic multitape finite automata
2020
120-132
Article
Memory Physical Aware Multi-Level Fault Diagnosis Flow
2020
700-711
Article
Fault Awareness for Memory BIST Architecture Shaped by Multidimensional Prediction Mechanism
2019
562-575
Article
Experimental study on Hamming and Hsiao Codes in the Context of Embedded Applications
2017
25-28
Article
Automated Flow for Test Pattern Creation for IPs in SoC
2017
21-24
Article
An Efficient Testing Methodology for Embedded Flash Memories
2017
422-425
Article
Security Issues in Test and Repair Infrastructure for Systems-on-Chip
2017
114-122
Conference
An efficient approach for memory repair by reducing the number of spares.
Conference
Extending fault periodicity table for testing faults in memories under 20nm.
Conference
A power based memory BIST grouping methodology.
Conference
Overview study on fault modeling and test methodology development for FinFET-based memories.
Conference
Securing Test Infrastructure of System-on-Chips
Conference
Armenia: Communicating to World Community in Electronic Test and Design
Patent
Testing Electronic Memories Based on Fault and Test Algorithm Periodicity